Skip to content

Commit d4b9838

Browse files
speryt-intelsperyt-intel
committed
Merge from 'main' to 'sycl-web' (#1)
2 parents d53e937 + cc327bd commit d4b9838

File tree

500 files changed

+36186
-12192
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

500 files changed

+36186
-12192
lines changed

‎clang/include/clang/Basic/BuiltinsX86.def‎

Lines changed: 78 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1876,6 +1876,84 @@ TARGET_BUILTIN(__builtin_ia32_cmpsh_mask, "UcV8xV8xIiUcIi", "ncV:128:", "avx512f
18761876
TARGET_BUILTIN(__builtin_ia32_loadsh128_mask, "V8xV8x*V8xUc", "nV:128:", "avx512fp16")
18771877
TARGET_BUILTIN(__builtin_ia32_storesh128_mask, "vV8x*V8xUc", "nV:128:", "avx512fp16")
18781878

1879+
TARGET_BUILTIN(__builtin_ia32_vcvtpd2ph128_mask, "V8xV2dV8xUc", "ncV:128:", "avx512fp16,avx512vl")
1880+
TARGET_BUILTIN(__builtin_ia32_vcvtpd2ph256_mask, "V8xV4dV8xUc", "ncV:256:", "avx512fp16,avx512vl")
1881+
TARGET_BUILTIN(__builtin_ia32_vcvtpd2ph512_mask, "V8xV8dV8xUcIi", "ncV:512:", "avx512fp16")
1882+
TARGET_BUILTIN(__builtin_ia32_vcvtph2pd128_mask, "V2dV8xV2dUc", "ncV:128:", "avx512fp16,avx512vl")
1883+
TARGET_BUILTIN(__builtin_ia32_vcvtph2pd256_mask, "V4dV8xV4dUc", "ncV:256:", "avx512fp16,avx512vl")
1884+
TARGET_BUILTIN(__builtin_ia32_vcvtph2pd512_mask, "V8dV8xV8dUcIi", "ncV:512:", "avx512fp16")
1885+
TARGET_BUILTIN(__builtin_ia32_vcvtsh2ss_round_mask, "V4fV4fV8xV4fUcIi", "ncV:128:", "avx512fp16")
1886+
TARGET_BUILTIN(__builtin_ia32_vcvtss2sh_round_mask, "V8xV8xV4fV8xUcIi", "ncV:128:", "avx512fp16")
1887+
TARGET_BUILTIN(__builtin_ia32_vcvtsd2sh_round_mask, "V8xV8xV2dV8xUcIi", "ncV:128:", "avx512fp16")
1888+
TARGET_BUILTIN(__builtin_ia32_vcvtsh2sd_round_mask, "V2dV2dV8xV2dUcIi", "ncV:128:", "avx512fp16")
1889+
TARGET_BUILTIN(__builtin_ia32_vcvtph2w128_mask, "V8sV8xV8sUc", "ncV:128:", "avx512fp16,avx512vl")
1890+
TARGET_BUILTIN(__builtin_ia32_vcvtph2w256_mask, "V16sV16xV16sUs", "ncV:256:", "avx512fp16,avx512vl")
1891+
TARGET_BUILTIN(__builtin_ia32_vcvtph2w512_mask, "V32sV32xV32sUiIi", "ncV:512:", "avx512fp16")
1892+
TARGET_BUILTIN(__builtin_ia32_vcvttph2w128_mask, "V8sV8xV8sUc", "ncV:128:", "avx512fp16,avx512vl")
1893+
TARGET_BUILTIN(__builtin_ia32_vcvttph2w256_mask, "V16sV16xV16sUs", "ncV:256:", "avx512fp16,avx512vl")
1894+
TARGET_BUILTIN(__builtin_ia32_vcvttph2w512_mask, "V32sV32xV32sUiIi", "ncV:512:", "avx512fp16")
1895+
TARGET_BUILTIN(__builtin_ia32_vcvtw2ph128_mask, "V8xV8sV8xUc", "ncV:128:", "avx512fp16,avx512vl")
1896+
TARGET_BUILTIN(__builtin_ia32_vcvtw2ph256_mask, "V16xV16sV16xUs", "ncV:256:", "avx512fp16,avx512vl")
1897+
TARGET_BUILTIN(__builtin_ia32_vcvtw2ph512_mask, "V32xV32sV32xUiIi", "ncV:512:", "avx512fp16")
1898+
TARGET_BUILTIN(__builtin_ia32_vcvtph2uw128_mask, "V8UsV8xV8UsUc", "ncV:128:", "avx512fp16,avx512vl")
1899+
TARGET_BUILTIN(__builtin_ia32_vcvtph2uw256_mask, "V16UsV16xV16UsUs", "ncV:256:", "avx512fp16,avx512vl")
1900+
TARGET_BUILTIN(__builtin_ia32_vcvtph2uw512_mask, "V32UsV32xV32UsUiIi", "ncV:512:", "avx512fp16")
1901+
TARGET_BUILTIN(__builtin_ia32_vcvttph2uw128_mask, "V8UsV8xV8UsUc", "ncV:128:", "avx512fp16,avx512vl")
1902+
TARGET_BUILTIN(__builtin_ia32_vcvttph2uw256_mask, "V16UsV16xV16UsUs", "ncV:256:", "avx512fp16,avx512vl")
1903+
TARGET_BUILTIN(__builtin_ia32_vcvttph2uw512_mask, "V32UsV32xV32UsUiIi", "ncV:512:", "avx512fp16")
1904+
TARGET_BUILTIN(__builtin_ia32_vcvtuw2ph128_mask, "V8xV8UsV8xUc", "ncV:128:", "avx512fp16,avx512vl")
1905+
TARGET_BUILTIN(__builtin_ia32_vcvtuw2ph256_mask, "V16xV16UsV16xUs", "ncV:256:", "avx512fp16,avx512vl")
1906+
TARGET_BUILTIN(__builtin_ia32_vcvtuw2ph512_mask, "V32xV32UsV32xUiIi", "ncV:512:", "avx512fp16")
1907+
TARGET_BUILTIN(__builtin_ia32_vcvtph2dq128_mask, "V4iV8xV4iUc", "ncV:128:", "avx512fp16,avx512vl")
1908+
TARGET_BUILTIN(__builtin_ia32_vcvtph2dq256_mask, "V8iV8xV8iUc", "ncV:256:", "avx512fp16,avx512vl")
1909+
TARGET_BUILTIN(__builtin_ia32_vcvtph2dq512_mask, "V16iV16xV16iUsIi", "ncV:512:", "avx512fp16")
1910+
TARGET_BUILTIN(__builtin_ia32_vcvtph2udq128_mask, "V4UiV8xV4UiUc", "ncV:128:", "avx512fp16,avx512vl")
1911+
TARGET_BUILTIN(__builtin_ia32_vcvtph2udq256_mask, "V8UiV8xV8UiUc", "ncV:256:", "avx512fp16,avx512vl")
1912+
TARGET_BUILTIN(__builtin_ia32_vcvtph2udq512_mask, "V16UiV16xV16UiUsIi", "ncV:512:", "avx512fp16")
1913+
TARGET_BUILTIN(__builtin_ia32_vcvtdq2ph128_mask, "V8xV4iV8xUc", "ncV:128:", "avx512fp16,avx512vl")
1914+
TARGET_BUILTIN(__builtin_ia32_vcvtdq2ph256_mask, "V8xV8iV8xUc", "ncV:256:", "avx512fp16,avx512vl")
1915+
TARGET_BUILTIN(__builtin_ia32_vcvtdq2ph512_mask, "V16xV16iV16xUsIi", "ncV:512:", "avx512fp16")
1916+
TARGET_BUILTIN(__builtin_ia32_vcvtudq2ph128_mask, "V8xV4UiV8xUc", "ncV:128:", "avx512fp16,avx512vl")
1917+
TARGET_BUILTIN(__builtin_ia32_vcvtudq2ph256_mask, "V8xV8UiV8xUc", "ncV:256:", "avx512fp16,avx512vl")
1918+
TARGET_BUILTIN(__builtin_ia32_vcvtudq2ph512_mask, "V16xV16UiV16xUsIi", "ncV:512:", "avx512fp16")
1919+
TARGET_BUILTIN(__builtin_ia32_vcvttph2dq128_mask, "V4iV8xV4iUc", "ncV:128:", "avx512fp16,avx512vl")
1920+
TARGET_BUILTIN(__builtin_ia32_vcvttph2dq256_mask, "V8iV8xV8iUc", "ncV:256:", "avx512fp16,avx512vl")
1921+
TARGET_BUILTIN(__builtin_ia32_vcvttph2dq512_mask, "V16iV16xV16iUsIi", "ncV:512:", "avx512fp16")
1922+
TARGET_BUILTIN(__builtin_ia32_vcvttph2udq128_mask, "V4UiV8xV4UiUc", "ncV:128:", "avx512fp16,avx512vl")
1923+
TARGET_BUILTIN(__builtin_ia32_vcvttph2udq256_mask, "V8UiV8xV8UiUc", "ncV:256:", "avx512fp16,avx512vl")
1924+
TARGET_BUILTIN(__builtin_ia32_vcvttph2udq512_mask, "V16UiV16xV16UiUsIi", "ncV:512:", "avx512fp16")
1925+
TARGET_BUILTIN(__builtin_ia32_vcvtqq2ph128_mask, "V8xV2OiV8xUc", "ncV:128:", "avx512fp16,avx512vl")
1926+
TARGET_BUILTIN(__builtin_ia32_vcvtqq2ph256_mask, "V8xV4OiV8xUc", "ncV:256:", "avx512fp16,avx512vl")
1927+
TARGET_BUILTIN(__builtin_ia32_vcvtqq2ph512_mask, "V8xV8OiV8xUcIi", "ncV:512:", "avx512fp16")
1928+
TARGET_BUILTIN(__builtin_ia32_vcvtph2qq128_mask, "V2OiV8xV2OiUc", "ncV:128:", "avx512fp16,avx512vl")
1929+
TARGET_BUILTIN(__builtin_ia32_vcvtph2qq256_mask, "V4OiV8xV4OiUc", "ncV:256:", "avx512fp16,avx512vl")
1930+
TARGET_BUILTIN(__builtin_ia32_vcvtph2qq512_mask, "V8OiV8xV8OiUcIi", "ncV:512:", "avx512fp16")
1931+
TARGET_BUILTIN(__builtin_ia32_vcvtuqq2ph128_mask, "V8xV2UOiV8xUc", "ncV:128:", "avx512fp16,avx512vl")
1932+
TARGET_BUILTIN(__builtin_ia32_vcvtuqq2ph256_mask, "V8xV4UOiV8xUc", "ncV:256:", "avx512fp16,avx512vl")
1933+
TARGET_BUILTIN(__builtin_ia32_vcvtuqq2ph512_mask, "V8xV8UOiV8xUcIi", "ncV:512:", "avx512fp16")
1934+
TARGET_BUILTIN(__builtin_ia32_vcvtph2uqq128_mask, "V2UOiV8xV2UOiUc", "ncV:128:", "avx512fp16,avx512vl")
1935+
TARGET_BUILTIN(__builtin_ia32_vcvtph2uqq256_mask, "V4UOiV8xV4UOiUc", "ncV:256:", "avx512fp16,avx512vl")
1936+
TARGET_BUILTIN(__builtin_ia32_vcvtph2uqq512_mask, "V8UOiV8xV8UOiUcIi", "ncV:512:", "avx512fp16")
1937+
TARGET_BUILTIN(__builtin_ia32_vcvttph2qq128_mask, "V2OiV8xV2OiUc", "ncV:128:", "avx512fp16,avx512vl")
1938+
TARGET_BUILTIN(__builtin_ia32_vcvttph2qq256_mask, "V4OiV8xV4OiUc", "ncV:256:", "avx512fp16,avx512vl")
1939+
TARGET_BUILTIN(__builtin_ia32_vcvttph2qq512_mask, "V8OiV8xV8OiUcIi", "ncV:512:", "avx512fp16")
1940+
TARGET_BUILTIN(__builtin_ia32_vcvttph2uqq128_mask, "V2UOiV8xV2UOiUc", "ncV:128:", "avx512fp16,avx512vl")
1941+
TARGET_BUILTIN(__builtin_ia32_vcvttph2uqq256_mask, "V4UOiV8xV4UOiUc", "ncV:256:", "avx512fp16,avx512vl")
1942+
TARGET_BUILTIN(__builtin_ia32_vcvttph2uqq512_mask, "V8UOiV8xV8UOiUcIi", "ncV:512:", "avx512fp16")
1943+
TARGET_BUILTIN(__builtin_ia32_vcvtsh2si32, "iV8xIi", "ncV:128:", "avx512fp16")
1944+
TARGET_BUILTIN(__builtin_ia32_vcvtsh2usi32, "UiV8xIi", "ncV:128:", "avx512fp16")
1945+
TARGET_BUILTIN(__builtin_ia32_vcvtusi2sh, "V8xV8xUiIi", "ncV:128:", "avx512fp16")
1946+
TARGET_BUILTIN(__builtin_ia32_vcvtsi2sh, "V8xV8xiIi", "ncV:128:", "avx512fp16")
1947+
TARGET_BUILTIN(__builtin_ia32_vcvttsh2si32, "iV8xIi", "ncV:128:", "avx512fp16")
1948+
TARGET_BUILTIN(__builtin_ia32_vcvttsh2usi32, "UiV8xIi", "ncV:128:", "avx512fp16")
1949+
1950+
TARGET_BUILTIN(__builtin_ia32_vcvtph2psx128_mask, "V4fV8xV4fUc", "ncV:128:", "avx512fp16,avx512vl")
1951+
TARGET_BUILTIN(__builtin_ia32_vcvtph2psx256_mask, "V8fV8xV8fUc", "ncV:256:", "avx512fp16,avx512vl")
1952+
TARGET_BUILTIN(__builtin_ia32_vcvtph2psx512_mask, "V16fV16xV16fUsIi", "ncV:512:", "avx512fp16")
1953+
TARGET_BUILTIN(__builtin_ia32_vcvtps2phx128_mask, "V8xV4fV8xUc", "ncV:128:", "avx512fp16,avx512vl")
1954+
TARGET_BUILTIN(__builtin_ia32_vcvtps2phx256_mask, "V8xV8fV8xUc", "ncV:256:", "avx512fp16,avx512vl")
1955+
TARGET_BUILTIN(__builtin_ia32_vcvtps2phx512_mask, "V16xV16fV16xUsIi", "ncV:512:", "avx512fp16")
1956+
18791957
// generic select intrinsics
18801958
TARGET_BUILTIN(__builtin_ia32_selectb_128, "V16cUsV16cV16c", "ncV:128:", "avx512bw,avx512vl")
18811959
TARGET_BUILTIN(__builtin_ia32_selectb_256, "V32cUiV32cV32c", "ncV:256:", "avx512bw,avx512vl")

‎clang/include/clang/Basic/BuiltinsX86_64.def‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,12 @@ TARGET_BUILTIN(__builtin_ia32_cvtsi2sd64, "V2dV2dOiIi", "ncV:128:", "avx512f")
9292
TARGET_BUILTIN(__builtin_ia32_cvtsi2ss64, "V4fV4fOiIi", "ncV:128:", "avx512f")
9393
TARGET_BUILTIN(__builtin_ia32_cvtusi2sd64, "V2dV2dUOiIi", "ncV:128:", "avx512f")
9494
TARGET_BUILTIN(__builtin_ia32_cvtusi2ss64, "V4fV4fUOiIi", "ncV:128:", "avx512f")
95+
TARGET_BUILTIN(__builtin_ia32_vcvtsh2si64, "OiV8xIi", "ncV:128:", "avx512fp16")
96+
TARGET_BUILTIN(__builtin_ia32_vcvtsh2usi64, "UOiV8xIi", "ncV:128:", "avx512fp16")
97+
TARGET_BUILTIN(__builtin_ia32_vcvtusi642sh, "V8xV8xUOiIi", "ncV:128:", "avx512fp16")
98+
TARGET_BUILTIN(__builtin_ia32_vcvtsi642sh, "V8xV8xOiIi", "ncV:128:", "avx512fp16")
99+
TARGET_BUILTIN(__builtin_ia32_vcvttsh2si64, "OiV8xIi", "ncV:128:", "avx512fp16")
100+
TARGET_BUILTIN(__builtin_ia32_vcvttsh2usi64, "UOiV8xIi", "ncV:128:", "avx512fp16")
95101
TARGET_BUILTIN(__builtin_ia32_directstore_u64, "vULi*ULi", "n", "movdiri")
96102

97103
// UINTR

‎clang/include/clang/Basic/DiagnosticGroups.td‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -823,8 +823,10 @@ def ReservedIdentifier : DiagGroup<"reserved-identifier",
823823
// under separate flags.
824824
//
825825
def UnreachableCodeLoopIncrement : DiagGroup<"unreachable-code-loop-increment">;
826+
def UnreachableCodeFallthrough : DiagGroup<"unreachable-code-fallthrough">;
826827
def UnreachableCode : DiagGroup<"unreachable-code",
827-
[UnreachableCodeLoopIncrement]>;
828+
[UnreachableCodeLoopIncrement,
829+
UnreachableCodeFallthrough]>;
828830
def UnreachableCodeBreak : DiagGroup<"unreachable-code-break">;
829831
def UnreachableCodeReturn : DiagGroup<"unreachable-code-return">;
830832
def UnreachableCodeAggressive : DiagGroup<"unreachable-code-aggressive",

‎clang/include/clang/Basic/DiagnosticSemaKinds.td‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -715,6 +715,9 @@ def warn_unreachable_return : Warning<
715715
def warn_unreachable_loop_increment : Warning<
716716
"loop will run at most once (loop increment never executed)">,
717717
InGroup<UnreachableCodeLoopIncrement>, DefaultIgnore;
718+
def warn_unreachable_fallthrough_attr : Warning<
719+
"fallthrough annotation in unreachable code">,
720+
InGroup<UnreachableCodeFallthrough>, DefaultIgnore;
718721
def note_unreachable_silence : Note<
719722
"silence by adding parentheses to mark code as explicitly dead">;
720723

@@ -9628,9 +9631,6 @@ def err_fallthrough_attr_outside_switch : Error<
96289631
"fallthrough annotation is outside switch statement">;
96299632
def err_fallthrough_attr_invalid_placement : Error<
96309633
"fallthrough annotation does not directly precede switch label">;
9631-
def warn_fallthrough_attr_unreachable : Warning<
9632-
"fallthrough annotation in unreachable code">,
9633-
InGroup<ImplicitFallthrough>, DefaultIgnore;
96349634

96359635
def warn_unreachable_default : Warning<
96369636
"default label in switch which covers all enumeration values">,

‎clang/include/clang/Basic/TargetInfo.h‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -871,6 +871,11 @@ class TargetInfo : public virtual TransferrableTargetInfo,
871871
/// across the current set of primary and secondary targets.
872872
virtual ArrayRef<Builtin::Info> getTargetBuiltins() const = 0;
873873

874+
/// Returns target-specific min and max values VScale_Range.
875+
virtual Optional<std::pair<unsigned, unsigned>>
876+
getVScaleRange(const LangOptions &LangOpts) const {
877+
return None;
878+
}
874879
/// The __builtin_clz* and __builtin_ctz* built-in
875880
/// functions are specified to have undefined results for zero inputs, but
876881
/// on targets that support these operations in a way that provides

‎clang/lib/AST/ASTDiagnostic.cpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1088,6 +1088,9 @@ class TemplateDiff {
10881088
Ty->getAs<TemplateSpecializationType>())
10891089
return TST;
10901090

1091+
if (const auto* SubstType = Ty->getAs<SubstTemplateTypeParmType>())
1092+
Ty = SubstType->getReplacementType();
1093+
10911094
const RecordType *RT = Ty->getAs<RecordType>();
10921095

10931096
if (!RT)

‎clang/lib/Basic/Targets/AArch64.cpp‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -424,6 +424,17 @@ ArrayRef<Builtin::Info> AArch64TargetInfo::getTargetBuiltins() const {
424424
Builtin::FirstTSBuiltin);
425425
}
426426

427+
Optional<std::pair<unsigned, unsigned>>
428+
AArch64TargetInfo::getVScaleRange(const LangOptions &LangOpts) const {
429+
if (LangOpts.ArmSveVectorBits) {
430+
unsigned VScale = LangOpts.ArmSveVectorBits / 128;
431+
return std::pair<unsigned, unsigned>(VScale, VScale);
432+
}
433+
if (hasFeature("sve"))
434+
return std::pair<unsigned, unsigned>(0, 16);
435+
return None;
436+
}
437+
427438
bool AArch64TargetInfo::hasFeature(StringRef Feature) const {
428439
return Feature == "aarch64" || Feature == "arm64" || Feature == "arm" ||
429440
(Feature == "neon" && (FPU & NeonMode)) ||

‎clang/lib/Basic/Targets/AArch64.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -96,6 +96,9 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo {
9696

9797
ArrayRef<Builtin::Info> getTargetBuiltins() const override;
9898

99+
Optional<std::pair<unsigned, unsigned>>
100+
getVScaleRange(const LangOptions &LangOpts) const override;
101+
99102
bool hasFeature(StringRef Feature) const override;
100103
bool handleTargetFeatures(std::vector<std::string> &Features,
101104
DiagnosticsEngine &Diags) override;

‎clang/lib/CodeGen/CGBuiltin.cpp‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12729,10 +12729,16 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
1272912729
case X86::BI__builtin_ia32_cvtdq2ps512_mask:
1273012730
case X86::BI__builtin_ia32_cvtqq2ps512_mask:
1273112731
case X86::BI__builtin_ia32_cvtqq2pd512_mask:
12732+
case X86::BI__builtin_ia32_vcvtw2ph512_mask:
12733+
case X86::BI__builtin_ia32_vcvtdq2ph512_mask:
12734+
case X86::BI__builtin_ia32_vcvtqq2ph512_mask:
1273212735
return EmitX86ConvertIntToFp(*this, E, Ops, /*IsSigned*/ true);
1273312736
case X86::BI__builtin_ia32_cvtudq2ps512_mask:
1273412737
case X86::BI__builtin_ia32_cvtuqq2ps512_mask:
1273512738
case X86::BI__builtin_ia32_cvtuqq2pd512_mask:
12739+
case X86::BI__builtin_ia32_vcvtuw2ph512_mask:
12740+
case X86::BI__builtin_ia32_vcvtudq2ph512_mask:
12741+
case X86::BI__builtin_ia32_vcvtuqq2ph512_mask:
1273612742
return EmitX86ConvertIntToFp(*this, E, Ops, /*IsSigned*/ false);
1273712743

1273812744
case X86::BI__builtin_ia32_vfmaddss3:

‎clang/lib/CodeGen/CGCall.cpp‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1892,7 +1892,7 @@ void CodeGenModule::addDefaultFunctionDefinitionAttributes(llvm::Function &F) {
18921892
getDefaultFunctionAttributes(F.getName(), F.hasOptNone(),
18931893
/* AttrOnCallSite = */ false, FuncAttrs);
18941894
// TODO: call GetCPUAndFeaturesAttributes?
1895-
F.addAttributes(llvm::AttributeList::FunctionIndex, FuncAttrs);
1895+
F.addFnAttrs(FuncAttrs);
18961896
}
18971897

18981898
void CodeGenModule::addDefaultFunctionDefinitionAttributes(
@@ -4540,9 +4540,7 @@ maybeRaiseRetAlignmentAttribute(llvm::LLVMContext &Ctx,
45404540
if (CurAlign >= NewAlign)
45414541
return Attrs;
45424542
llvm::Attribute AlignAttr = llvm::Attribute::getWithAlignment(Ctx, NewAlign);
4543-
return Attrs
4544-
.removeAttribute(Ctx, llvm::AttributeList::ReturnIndex,
4545-
llvm::Attribute::AttrKind::Alignment)
4543+
return Attrs.removeRetAttribute(Ctx, llvm::Attribute::AttrKind::Alignment)
45464544
.addAttribute(Ctx, llvm::AttributeList::ReturnIndex, AlignAttr);
45474545
}
45484546

0 commit comments

Comments
 (0)